In the integrated circuit (IC) industry, copper has been recently proposed for use as a metallic interconnect for integrated circuits. Copper is preferred over traditional aluminum interconnects since copper has improved stress and electromigration properties, and reduced resistivity over that available when using aluminum interconnects. Unfortunately, copper readily diffuses through silicon-containing layers, such as single crystalline silicon and silicon dioxide, potentially effecting dielectric constants of insulating material and impairing electrical operation of transistors. Currently, optimal barrier materials for use within copper interconnects are being researched by the integrated circuit industry.
One copper barrier layer which has been proposed for use in the integrated circuit industry is a titanium/titanium nitride/titanium (Ti/TiN/Ti) barrier. A problem with this composite barrier layer is that step coverage of titanium is not adequate for integrated circuit processing and does not obtain high yields. In addition, the titanium/titanium nitride/titanium process requires three different deposition steps. In addition, the titanium portion of the composite barrier stack is exposed to copper resulting in a titanium-to-copper chemical interaction which changes the resistivity of the metallic interconnect. In addition, titanium nitride films used in this type of barrier layer are usually crystalline in nature whereby optimal copper containment is not obtained. Therefore, an alternative barrier to the titanium/titanium nitride/titanium barrier is desired in the industry.
Titanium nitride used in isolation has been proposed for use as a copper barrier layer. However, titanium nitride by itself has poor adhesion to copper. In addition, once deposited in isolation titanium nitride is formed in a crystalline manner whereby crystalline barriers are less effective at containing copper. In addition, a titanium nitride barrier used in isolation compromises step coverage compared to other barrier materials in high aspect ratio features as when sputter deposited.
FIG. 1 illustrates an Auger depth profile of a copper interconnect structure utilizing 400 angstroms of titanium nitride as a barrier layer. FIG. 1 has an X-axis which shows the position of the titanium nitride layer between zero and 400 angstroms. To the left of the 400 angstrom thick titanium nitride barrier is the copper interconnect material. To the right of the 400 angstrom titanium nitride barrier in FIG. 1 is the silicon-containing layer. A 400 angstrom titanium nitride barrier, as illustrated in FIG. 1, was stressed at 400.degree. C. for three hours. The annealing process of stressing the configuration at temperature over time is to accelerate the effects of copper diffusion and thus simulate a worst case condition. As can be seen in FIG. 1, copper atoms from the copper interconnect material, on the left of FIG. 1, readily diffused through the 400 angstrom titanium nitride barrier to penetrate into the silicon layer, as illustrated toward the right hand portion of FIG. 1. Therefore, FIG. 1 illustrates that a titanium nitride barrier of a thickness of 400 angstroms is not an adequate barrier for copper. While the thickness of the titanium nitride layer can be increased in order to improve barrier properties, the titanium nitride layer, while being conductive, is much more resistive than copper. Therefore, any thickening of the titanium nitride layer in an attempt to improve copper-containment will result in an increase in the resistivity of the metallic interconnect which is disadvantageous. Therefore, titanium nitride used in isolation is not optimal for use as a barrier layer.
FIG. 2 illustrates the use of a tantalum nitride barrier layer in isolation. FIG. 2 illustrates an X-axis where to the left of the zero mark of the X-axis is located a copper interconnect material. Between the zero point and the 400 angstrom point of the X-axis is located a tantalum nitride barrier. To the right of the 400 angstrom mark in FIG. 2 lies the silicon-containing integrated circuit layer. Through Auger depth profile measurements, FIG. 2 illustrates that copper can readily diffuse through the 400 angstrom thick tantalum nitride barrier layer after being stressed at 400.degree. C. for three hours. Again, the annealing is used to simulate a worst case condition of accelerated copper diffusion. Therefore, FIG. 2 illustrates that tantalum nitride in isolation as a barrier layer is not overly effective.
Therefore, a need exists in the industry for an improved barrier layer between copper and silicon-containing layer in the integrated circuit industry.